On PC's the register set of a UART is mapped in the I/O map of the processor. The twelve registers of the UART are accessible with 8 I/O bytes. To achieve this, read-only and write only registers are accessible using to the same PC I/O port when possible. In two situations, a bit (the divisor latch access bit) in one register is used to swap different registers on a specific port.
Four serial communication devices have been predefined on a PC. The UART's for these devices have default addresses assigned on which its registers are accessible. The devices are named COM1 through COM4. A default interrupt line number is also assigned to each device. Because only a few IRQ lines are available on PC systems, only two interrupt lines are used for four devices. The software must have the intelligence to detect which UART needs attention when an interrupt occurs if more than one UART share the same interrupt.
| Device | I/O address range | IRQ |
|---|---|---|
| COM1 | 0x3F8 - 0x3FF | 4 |
| COM2 | 0x2F8 - 0x2FF | 3 |
| COM3 | 0x3E8 - 0x3EF | 4 |
| COM4 | 0x2E8 - 0x2EF | 3 |
Please note, that the table lists only the default I/O addresses on IBM XT and AT compatible systems. On a PS2 system, other addresses are used. These values are only recommendations. If other hardware present in the computer makes it necessary, it is possible to move an UART to another I/O address or IRQ.
The actual I/O addresses used are stored in a table in the BIOS data area. This table starts at memory address 0000:0400 and contains important device information. Unfortunately, only the I/O port addresses of each UART is stored. No information is present about the IRQ used by a specific UART. This makes the table only partially useful for identifying the serial ports.
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